soft-core
英 [ˈsɒft kɔː(r)]
美 [ˈsɔːft kɔːr]
adj. 软性色情的; (性描写等)隐晦的，含蓄的
牛津词典
adj.
- 软性色情的；（性描写等）隐晦的，含蓄的
showing or describing sexual activity without being too detailed or shocking
柯林斯词典
- (性描写)非赤裸裸的，较隐晦的
Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.
双语例句
- This paper proposes a new method for embedded system designing, based on FPGA and soft-core CPU.
提出了一种基于FPGA（现场可编程门阵列）和软核CPU的嵌入式系统设计的新方法。 - It inherits the hardcore, soft-core, DSP, memory, peripheral I/ O and programmable logic.
它继承了硬核、软核、DSP、存储器外围I∕O及可编程逻辑。 - In practice, the designer can use this soft-core as a communication module through the FPGA implementation or to quickly build a Field Bus communication system to realize flexible CAN bus interface solutions.
在实际应用中设计者可以将此软核作为通讯模块通过FPGA实现，或者快速搭建现场总线通信系统，实现灵活的CAN总线接口方案。 - Research and Design of Nios ⅱ Soft-core Processor
NiosⅡ软核处理器的研究与设计 - Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
详细设计了帧间解码IP软核，包括运动矢量生成模块、预测处理模块和插值模块。 - For the digital part, this design is mean to construct the SOPC system in the FPGA, embedded Nios II soft-core processor to control the operation of the entire system.
对于数字部分，在FPGA内构建SOPC系统，嵌入NIOSii软核处理器对整个系统进行控制。 - First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
第一，运用了在单芯片上实现系统功能的设计思想，采用了高性能的软核处理器（NiosIICPU）和IP复用技术，提高了整个系统的运行速度和进一步改进的灵活性。 - According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
为构建网络化的数据采集系统，根据数据采集模块与处理控制模块通过以太网相连接的结构模型，设计了基于Nios软核系统的嵌入式以太网网络接口模块。 - With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
通过建立SDH芯片验证平台和SDH芯片测试平台，实现IP软核的功能仿真、时序仿真和芯片性能测试。 - The prototype designs with soft-core processors of Nios II in FPGA, improves the programmability of network processors.
网络处理器芯片原型采用NIOSii软核处理器在FPGA上实现，提高了网络处理器的可编程能力。